(1) Field of the Invention
The present invention relates to an interrupt control apparatus for controlling interrupts generated from interrupt resources, as a part of an OS (Operating System) for controlling a computer system.
(2) Description of the Related Art
Generally, the interrupt control in a computer system processes interrupts from each of the interrupt resources by unified management in the OS.
FIG. 1 is a diagram showing the relation of the transition from the kernel space to the user process space of the OS when an interrupt is generated, in the existing computer system. As shown in the diagram, an interrupt transitions to a user process within a process space 601, from an interrupt processing unit for receiving interrupts and after schedule processing by the scheduler, in a kernel space 602.
FIG. 2 is a diagram showing the structure of the interrupt control apparatus in the existing computer system. The diagram includes peripheral devices as interrupt resources generating interrupts, an interrupt controller, a CPU, an OS, and an application process, shown in a hierarchical manner. FIG. 3 is an operation explanatory diagram showing the process flow in FIG. 2 by focusing on the register structure of each component element. The operations in FIG. 2 shall be explained more specifically, using FIG. 3.
An interrupt controller (INTC) 502 detects the generation of an interrupt from a variety of peripheral devices (I/O apparatus) 501a, 501b, and the like, and sets a flag of a cause number within the cause number register 502a, corresponding to the interrupt cause concerned. If such interrupt cause is not masked by software settings, the interrupt controller 502 notifies a CPU 503 of the interrupt generation.
The CPU 503 possesses interrupt vector registers 503a complying with interrupt levels. After receiving the interrupt notification from the interrupt controller 502, the CPU 503 reads an interrupt vector from the interrupt vector register to which the interrupt cause is assigned, and executes an interrupt entry function 505 managed by the OS. By executing such entry function 505, determination of the interrupt cause, transition to a user interrupt handler, and so on is carried out. At that time, a scheduler 506 carries out schedule adjustment among other interrupts and other processes. After schedule adjustment, the scheduler 506 launches the interrupt handler 507a, 507b, or the like corresponding to the interrupt cause, and the process corresponding to the interrupt request is carried out (or the corresponding process is called).
It is common in the existing interrupt control apparatus to carry out the series of interrupt control through the operation mentioned above.
Incidentally, the usual OS does not assume the case in which only specific interrupt resources are considered as being outside the management of the OS, and a particular mechanism is required for such. As a particular mechanism for such purpose, an implementation method using a plurality of OSs and an OS-independent interrupt management program is disclosed in official publication of Japanese Laid-Open Patent Application No. 2001-216172 (hereinafter referred to as Reference 1).
Reference 1 discloses a method for interrupt control using a method in which the interrupt resources managed by one of OSs is taken by the OS-independent interrupt management program and distributed to the other OSs, and a method in which the launch timing of respective interrupt handlers is determined according to the execution status of the OSs. According to this method for interrupt control, a generated external interrupt is processed once through the interrupt management program, and it is possible to distribute the interrupt processing among the plurality of OSs and carry out such interrupt processing in the distribution destination OS. Furthermore, even in the case where the interrupt processing is multiplexed among the plurality of OSs, exclusive control is possible by managing the interrupt status through the interrupt management program.
However, according to the existing interrupt control apparatus, in the case where only a particular interrupt resource is considered as being outside the management of the OS, the problem exists in which responsiveness, from the generation of the interrupt to the execution of the corresponding application, in other words, real-timeliness, cannot be guaranteed.
Specifically, the problems mentioned below exist in the case where specific interrupt resources for an OS are separated and managed independently by another program.
(1) In Reference 1, interrupt status management becomes a necessity for the interrupt management program as the interrupt management program reconciles the multiplexing among the OSs carrying out interrupt processing. For example, in Reference 1, the scheduler 506 would be equivalent to an interrupt management program which carries out more complicated schedule adjustments. In processing through a new implementation of such interrupt management program, a degree of real-timeliness is lost with the additional requirement of managing the interrupt status, in addition to the interrupt entry function implemented in the existing OS.
(2) Regardless of Reference 1, conventionally, there is no mechanism that positions an interrupt handler function of a user, corresponding to a particular interrupt cause, in a user process space instead of the address space (kernel space) of the OS, and carries out the transition to such positioned interrupt handler function without inhibiting interrupt responsiveness. In the process of transition from the kernel space 602 to the process space 601 shown in FIG. 1, the responsiveness of the scheduler is dependent on the performance of the OS. In a multi-purpose OS, there is no guarantee for the time taken up to the transition to the application, after an interrupt is generated. In other words, the absence of a guarantee for real-timeliness becomes an issue.
(3) The structure in Reference 1 is one which requires at least two or more OSs, as the interrupt resources for the CPU are divided for management by a plurality of OSs, and the case where interrupt resources are divided between one OS and the application program running on such OS is not assumed.
In consideration of the aforementioned issues, the present invention has as an objective, to provide in a multi-purpose OS, an interrupt control apparatus for interrupts from interrupt resources, which guarantees real-timeliness, a control method as well as a program thereof. In particular, the present invention has as an objective to provide an interrupt control apparatus for guaranteeing and realizing on a multi-purpose OS, real-timeliness commonly required in built-in devices, a control method as well as a program thereof.